The vocabulary of the machines AI runs on — chip manufacturing, the foundry business model, and accelerated computing — with the parts that transfer directly to building reliable software.
Every AI system is manufactured twice: once as silicon, once as software. The second manufacturing process has quietly inherited the first one's vocabulary, and the most useful ideas in this glossary are the ones that cross over. For the story behind most of these terms, see the complete history of TSMC and Morris Chang.
Chip Manufacturing Fundamentals
Yield: The share of chips on a wafer that come out working. Driven by defect density, and it falls exponentially as chip area grows. Yield is the number the whole semiconductor business turns on, because a wafer costs the same to process whether its chips pass or fail — so raising yield collapses cost per working chip without adding a single machine.
Defect Density (D₀): Defects per square centimetre of wafer surface. The input that decides yield. A standard first-order model gives yield as Y = e^(−D₀ × A), where A is the chip's area.
Wafer: The thin disc of silicon that chips are built on, typically 300mm across in modern fabs. Hundreds or thousands of chips are patterned onto one wafer at once, which is why area is so expensive.
Die: A single chip on the wafer, before it is cut out and packaged. "Good die" means one that passed testing. Doubling a die's area does not double the loss from defects — it multiplies it.
Fab: Short for fabrication plant, the factory where wafers are processed. A leading-edge fab costs well over ten billion dollars, which is the economic fact that made the foundry model necessary.
Process Node: A generation of manufacturing technology, labelled with names like N3 or N2. These names are not measurements — nothing on a "3nm" chip is 3nm across. Treat a node name the way you treat a car model year.
Lithography: Printing circuit patterns onto the wafer with light. The precision bottleneck of the entire industry, and the reason a handful of equipment makers hold enormous leverage.
Mask: The patterned template used in lithography, analogous to a photographic negative. A full mask set for a leading-edge node costs millions, which is why design mistakes are so expensive to fix.
Tapeout: The moment a finished design is sent to the fab for manufacturing. After tapeout, changes mean a new mask set and months of delay — the hardware equivalent of shipping without the ability to hotfix.
Binning: Sorting manufactured chips by how well they actually performed, then selling them as different products. Chips that fail top-tier testing become cheaper models rather than scrap. Binning turns yield loss into a product line.
Final Test: The step where finished chips are checked before shipment. The load-bearing principle: the tester must be independent of the thing being tested. A test rig calibrated by the machine that made the chip proves nothing.
The Foundry Business Model
Foundry: A factory that manufactures chips designed by other companies.
Pure-Play Foundry: A foundry whose only business is manufacturing other companies' designs, with no products of its own. TSMC created this category in 1987. The innovation was contractual rather than technical — a promise never to compete with customers, which meant a designer could hand over its most valuable intellectual property without arming a rival.
Fabless: A chip company that designs but owns no factory. NVIDIA, Qualcomm, AMD and Apple's silicon group are fabless. The entire category only became possible once a neutral foundry existed.
IDM (Integrated Device Manufacturer): A company that both designs and manufactures its own chips — Intel and Texas Instruments historically. The model the pure-play foundry was defined against.
Design Rules: The constraints a design must satisfy to be manufacturable on a given process. The formal interface between designer and factory.
PDK (Process Design Kit): The package of models, rules and libraries a foundry gives customers so they can design for its process. A neutral interface contract that lets the designer and the manufacturer be different companies.
ASIC (Application-Specific Integrated Circuit): A chip built for one particular purpose rather than for general computing.
SoC (System on a Chip): A single chip integrating what used to be many separate components — processor, memory controller, graphics, connectivity.
Install Base: The accumulated population of deployed hardware that existing software already runs on. The reason a computing architecture becomes hard to displace: the platform's value compounds with every program written for it, independent of the hardware underneath.
Scaling Laws and Physical Limits
Moore's Law: Gordon Moore's 1965 observation that the number of transistors on a chip was doubling rapidly. Frequently misquoted — the 1965 paper said every year; Moore revised it to every two years in 1975. The famous "18 months" was never Moore's at all; it came from Intel colleague David House, who folded in per-transistor performance gains.
Dennard Scaling: The companion rule that as transistors shrink, power density stays constant — so you could add transistors and raise clock speeds without the chip melting. Dennard scaling broke down around the mid-2000s, which is the real reason processors stopped getting dramatically faster and started getting more parallel. Distinct from Moore's law: Moore's law is about transistor count, Dennard scaling is about power.
Transistor: The switch that all digital computing is built from, invented at Bell Labs in 1947.
MOSFET: The transistor type that made modern chip density possible, invented at Bell Labs in 1959. It displaced earlier bipolar designs through the 1970s and 1980s, and without it Moore's law would have stalled at a ceiling of roughly ten thousand transistors per chip.
Serial Yield: What happens when yields multiply along a chain of steps: Y = y₁ × y₂ × … × yₙ. This is the single most transferable idea in this glossary. A 30-step process at 99% per step yields 74%; at 95% per step it yields 21%. The per-step number barely moved and the end-to-end number collapsed — which is exactly why long-horizon AI agent runs fail in ways that per-step benchmarks never reveal.
Amdahl's Law: The limit on speedup from parallelism. If half your work is unparallelizable, infinite parallel hardware still only doubles your speed. The reason performance work eventually has to attack every layer at once.
Accelerated Computing
CPU (Central Processing Unit): A general-purpose processor, optimised for doing a wide variety of tasks reasonably well, one or a few at a time.
GPU (Graphics Processing Unit): A processor originally built to render images, whose architecture — many simple cores running the same operation across a lot of data — turned out to match the mathematics of neural networks. This is why AI runs on graphics hardware.
Accelerated Computing: Using purpose-built hardware for the heavy part of a workload while a general-purpose processor handles the rest. Distinguished from mere "accelerators" by having a stable software platform on top, so an install base can accumulate across hardware generations.
General-Purpose Computing: Computing on hardware that makes no assumptions about the workload. More flexible, far less efficient per unit of energy.
The Programmability Trade-off: The central design tension in accelerated computing — make the hardware more programmable and you widen the market, but you lose the efficiency multiples that justified the specialised hardware in the first place. Jensen Huang has called walking that line "one of the artistries" of building this kind of platform.
CUDA: NVIDIA's programming platform for running general-purpose work on GPUs, introduced alongside the unified-shader Tesla architecture in November 2006, with the public toolkit following in February 2007. Credited to Ian Buck and John Nickolls — Buck's academic work on the Brook language at Stanford was its direct antecedent.
Streaming Multiprocessor (SM): The repeating processing block a GPU is built from. Understanding that a GPU is an array of these, rather than one big processor, is the key to understanding why it is fast at some things and slow at others.
Shared Memory: Small, very fast memory local to each processing block, which programs manage explicitly. The feature that made general-purpose GPU programming practical.
Co-Design: Designing hardware, software, and algorithms together rather than in sequence behind fixed interfaces. Buys large performance gains, at the cost of the abstraction boundaries that make systems easy to reason about.
Tensor: A multi-dimensional array — the data structure nearly all deep learning computation operates on.
Training: Building a model by adjusting its parameters against data. Compute-heavy, done once per model version.
Inference: Running a finished model to produce an answer. Cheaper per operation than training, but it runs constantly, so at scale it dominates total compute cost.
FLOPS: Floating-point operations per second, the standard unit of raw compute throughput. A capability measure, not a reliability measure.
HBM (High Bandwidth Memory): Memory stacked vertically and placed beside the processor for very high bandwidth. Frequently the real constraint on AI performance — feeding the processor is harder than building it.
Advanced Packaging: Assembling multiple chips into one integrated component. As shrinking transistors gets harder, more performance now comes from how chips are combined.
Design and Verification Tools
EDA (Electronic Design Automation): Software for designing chips. Its arrival changed what designers were even thinking about — from transistors and gates to code. Jensen Huang describes exactly this shift in his own career, and uses it as the template for what AI is now doing to software.
HDL (Hardware Description Language): A language for describing circuit behaviour, which tools then translate into an actual layout. The abstraction that made billion-transistor designs possible.
Logic Synthesis: Automatically converting a high-level description into optimised gates. The step that turned chip design from drawing into programming.
Hardware Emulation: Running a chip design on specialised hardware before manufacturing it, so software can be tested against it pre-silicon. Expensive, and the reason a design can be right the first time when a mistake costs a mask set.
Verification: Establishing that a design does what it is supposed to do before it is built. In chips this consumes more effort than design itself — a discipline software is only now rediscovering for AI-generated code.
What Chip Vocabulary Teaches Software Teams
Process Control vs Inspection: A factory does not buy quality by inspecting harder at the end. It buys quality by raising every individual step. The software translation: step-level evaluations and guardrails that fire before a bad state propagates beat a single check at the finish line.
Tester Independence: Final test uses a separate machine with its own calibration. When the model that wrote the code also certifies the code, there is no independent test — only a self-report.
The Complaint Metric: Morris Chang evaluated his factory managers not on yield but on how many complaints he received from customers about their fab, keeping no profit and loss statement per fab. The insight is about where a metric belongs: yield is what the process is tuned on, the customer's experience is what management is judged on. It is also the cheapest quality instrument available, because the customer runs the test for you.
Manufacturing Yield for Software: Every AI system reports yield numbers without calling them that — how many generated apps work, what fraction of agent runs complete, how many suggestions survive review. Naming the unit is the first step to managing it.
Taskade already reports one number in this family: automations carry a health signal computed from recent run history, and every run keeps a step-by-step log with per-step inputs and outputs. That is process control rather than a satisfaction survey — it tells you which step is dragging the line down. Extend the same discipline to everything an AI agent produces and you have a production line you can actually read.
Related Reading
- What Is TSMC? The Complete History of Morris Chang and the Pure-Play Foundry — where most of these terms come from
- AI & Automation Terms — the agent-era vocabulary
- Technical Terms — developer and platform terminology
- Core Terms — Taskade fundamentals
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